Tower Semiconductor Ltd
TSEM Real Time Price USDRecent trades of TSEM by members of U.S. Congress
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Recently reported changes in TSEM holdings by institutional investors
Quarterly net insider trading by TSEM's directors and management
* Insider trading data parsed from SEC Form 4 filings by Quiver Quantitative. Sign up for the Quiver API for real-time access.
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About
Key Metrics
Return (1d)
Return (30d)
Return (1Y)
CAGR (Total)
Max Drawdown
Beta
Alpha
Sharpe Ratio
Win Rate
Average Win
Average Loss
Annual Volatility
Annual Std Dev
Information Ratio
Treynor Ratio
Total Trades
Metrics Definitions
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Alpha
Measures a portfolio's risk-adjusted performance against that of its benchmark
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Annual Standard Deviation
Measures how much the portfolio's total return varies from its mean or average.
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Annual Volatility
A statistical measure of the dispersion of returns for the portfolio.
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Average Win
The average return (%) for trades that resulted in a positive return.
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Average Loss
The average return (%) for trades that resulted in a negative return.
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Beta
A measure of the volatility of the portfolio compared to the market as a whole.
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CAGR
CAGR (Compounded Annual Growth Rate), is the historical annualized rate of return for an investment strategy, throughout the backtest period.
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Information Ratio
A measurement of portfolio returns beyond the returns of its benchmark compared to the volatility of those returns.
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Max Drawdown
the maximum observed loss from a peak to a trough of a portfolio, before a new peak is attained.
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Sharpe Ratio
The Sharpe Ratio is a measure of historical risk-adjusted return, which quantifies the amount of return that an investor received per unit of risk.
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Total Trades
The total number of trades made by this strategy.
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Treynor Ratio
Attempts to measure how successful an investment is in providing compensation to investors for taking on investment risk.
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Win Rate
The percentage of total trades that resulted in a positive return.
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Government lobbying spending instances
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$30,000 Apr 19, 2022 Issue: Manufacturing Defense
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$50,000 Jan 14, 2022 Issue: Defense Manufacturing
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$50,000 Oct 20, 2021 Issue: Science/Technology Manufacturing Defense
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$50,000 Jul 20, 2021 Issue: Science/Technology Manufacturing Defense
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$50,000 Apr 20, 2021 Issue: Science/Technology Manufacturing Defense
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$50,000 Jan 21, 2021 Issue: Manufacturing Budget/Appropriations Defense
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$20,000 Oct 21, 2020 Issue: Defense Budget/Appropriations Manufacturing
TSEM Estimated quarterly lobbying spending
TSEM Revenue by Segment or Geography
New TSEM patent grants
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Patent Title: Fingerprint sensor with direct recording to non-volatile memory May. 29, 2018
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Patent Title: High efficiency ac/dc power supply Apr. 24, 2018
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Patent Title: Schmitt trigger circuit with hysteresis determined by modified polysilicon gate dopants Apr. 03, 2018
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Patent Title: Hybrid mos-pcm cmos soi switch Mar. 13, 2018
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Patent Title: Semiconductor gas sensor using magnetic tunnel junction elements Feb. 06, 2018
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Patent Title: Device and system of a silicon controlled rectifier (scr) Jan. 30, 2018
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Patent Title: Backside illuminated (bsi) cmos image sensor (cis) with a resonant cavity and a method for manufacturing the bsi cis Jan. 09, 2018
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Patent Title: Image sensor pixel with memory node having buried channel and diode portions formed on n-type substrate Jan. 09, 2018
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Patent Title: Semiconductor die with a metal via Dec. 05, 2017
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Patent Title: Gas sensing using magnetic tunnel junction elements Dec. 05, 2017
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Patent Title: Ldmos device having a low angle sloped oxide Nov. 07, 2017
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Patent Title: Double-resurf ldmos with drift and psurf implants self-aligned to a stacked gate “bump” structure Oct. 31, 2017
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Patent Title: Apparatus, system and method of detecting leakage in a chamber Sep. 19, 2017
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Patent Title: Method for manufacturing a trench metal insulator metal capacitor Aug. 22, 2017
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Patent Title: Image sensor pixel with memory node having buried channel and diode portions Aug. 08, 2017
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Patent Title: Single-exposure high dynamic range cmos image sensor pixel with internal charge amplifier Aug. 08, 2017
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Patent Title: Deep silicon via as a drain sinker in integrated vertical dmos transistor Aug. 08, 2017
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Patent Title: Die including a high voltage capacitor May. 02, 2017
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Patent Title: Memristor using parallel asymmetrical transistors having shared floating gate and diode Dec. 06, 2016
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Patent Title: Soft-start circuit for switching regulator Nov. 01, 2016
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Patent Title: Double-resurf ldmos with drift and psurf implants self-aligned to a stacked gate “bump” structure Nov. 01, 2016
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Patent Title: Die including a schottky diode Oct. 04, 2016
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Patent Title: Back-end processing using low-moisture content oxide cap layer Aug. 30, 2016
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Patent Title: Battery powered charger Aug. 02, 2016
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Patent Title: Floating gate nvm with low-moisture-content oxide cap layer Jun. 28, 2016
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Patent Title: Apparatus, system and method of back side illumination (bsi) complementary metal-oxide-semiconductor (cmos) pixel array May. 31, 2016
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Patent Title: Logic unit including magnetic tunnel junction elements having two different anti-ferromagnetic layers May. 03, 2016
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Patent Title: Ldmos transistor having elevated field oxide bumps and method of making same May. 03, 2016
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Patent Title: High-speed compare operation using magnetic tunnel junction elements including two different anti-ferromagnetic layers May. 03, 2016
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Patent Title: Endoscope system using cmos image sensor having pixels without internal sample/hold circuit Feb. 09, 2016
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Patent Title: Cost-efficient treatment of fluoride waste Feb. 09, 2016
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Patent Title: Self-adjustable current source control circuit for linear regulators Jan. 19, 2016
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Patent Title: Device and method of gettering on silicon on insulator (soi) substrate Jan. 05, 2016
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Patent Title: Shared readout low noise global shutter image sensor method Dec. 08, 2015
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Patent Title: Shared readout low noise global shutter image sensor Oct. 13, 2015
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Patent Title: Single-exposure high dynamic range cmos image sensor pixel with internal charge amplifier Aug. 11, 2015
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Patent Title: Double resurf ldmos with separately patterned p+ and n+ buried layers formed by shared mask Aug. 11, 2015
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Patent Title: Embedded cost-efficient sonos non-volatile memory Jul. 14, 2015
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Patent Title: Flash-to-rom conversion Apr. 07, 2015
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Patent Title: Deep silicon via as a drain sinker in integrated vertical dmos transistor Dec. 30, 2014
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Patent Title: Photovoltaic device formed on porous silicon isolation Sep. 09, 2014
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Patent Title: Method for producing photovoltaic device isolated by porous silicon Sep. 09, 2014
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Patent Title: Method for making embedded cost-efficient sonos non-volatile memory May. 13, 2014
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Patent Title: High-k dielectric stack and method of fabricating same May. 13, 2014
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Patent Title: Three-dimensional nand memory with stacked mono-crystalline channels Dec. 03, 2013
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Patent Title: Cmos bootstrap circuit for dc/dc buck converter using low voltage cmos diode Sep. 17, 2013
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Patent Title: Cmos image sensor pixel without internal sample/hold circuit Aug. 27, 2013
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Patent Title: Method for generating a three-dimensional nand memory with mono-crystalline channels using sacrificial material Aug. 06, 2013
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Patent Title: High-resolution integrated x-ray cmos image sensor Aug. 06, 2013
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Patent Title: Floating gate inverter type memory cell and array Feb. 19, 2013
Federal grants, loans, and purchases
Estimated quarterly amount awarded to TSEM from public contracts
Recent insights relating to TSEM
Recent picks made for TSEM stock on CNBC
ETFs with the largest estimated holdings in TSEM
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- Is $TSEM stock a Buy, Sell, or Hold?
- What is the price target for $TSEM stock?
* Analyst consensus is not financial advice. Please see our data disclaimers .
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- Who owns $TSEM stock?
- Who owns the most shares of $TSEM stock?
- What funds own $TSEM stock?
* These are estimates based on data taken from SEC filings. There may be inaccuracies due to parsing errors, accidental double-counting, incorrect classification of indirectly owned shares, or any other number of issues.
The Quiver Smart Score combines our data on Congress Trading, Lobbying, Insider Trading, CNBC Mentions and more to provide a comprehensive view of the strength of a stock's underlying data.
The Smart Score grades stocks on a scale of 1 (weakest) to 10 (strongest) based on the strength of the underlying data.Sign Up to view TSEM Smart Score
See concise summaries of analyst reports, presenting both bullish and bearish arguments for a stock.
Example:
The Bulls Say summary highlights positive aspects of the stock.
The Bears Say summary points out potential risks and negative aspects of the stock.
Tower Semiconductor Ltd is a pure-play specialty foundry that manufactures semiconductors. As a pure-play foundry, it focuses on producing integrated circuits (ICs), based on the design specifications of customers. The company's line of integrated circuits is incorporated into a range of products and markets, including consumer electronics, personal computers, communications, automotive, and industrial and medical device products. It produces ICs alongside wholly-owned subsidiaries through fabrication facilities located in Japan. The company has a geographical presence in the USA, Japan, Asia (other than Japan), and Europe.